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Victim Alignment in Crosstalk-Aware Timing Analysis.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 261-274 (2010)

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CAD tools for variation tolerance., and . DAC, page 766. ACM, (2005)A Framework for Battery-Aware Sensor Management., , , and . DATE, page 962-967. IEEE Computer Society, (2004)Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic., , and . VLSI Design, page 240-. IEEE Computer Society, (2004)Statistical Timing Based Optimization using Gate Sizing., , and . DATE, page 400-405. IEEE Computer Society, (2005)Statistical Performance Analysis Optimization of Digital Circuits.. University of Michigan, USA, (2008)Implicit pseudo boolean enumeration algorithms for input vector control., and . DAC, page 767-772. ACM, (2004)Circuit optimization using statistical static timing analysis., , , and . DAC, page 321-324. ACM, (2005)A new statistical max operation for propagating skewness in statistical timing analysis., , , and . ICCAD, page 237-243. ACM, (2006)Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation., , , , and . ICCAD, page 1023-1028. IEEE Computer Society, (2005)Victim Alignment in Crosstalk-Aware Timing Analysis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 261-274 (2010)