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Disambiguation of "Martorell, Xavier"

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Using shared-data localization to reduce the cost of inspector-execution in unified-parallel-C programs.

, , , , and . Parallel Comput., (2016)

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Xavier Martorell

Carmen Tort-Martorell

Xavier Fontaine

Xavier Domont

Xavier Lambin

 

Other publications of authors with the same name

Work-Efficient Parallel Non-Maximum Suppression Kernels., , , and . Comput. J., 65 (4): 773-787 (2022)Compiler Automatic Discovery of OmpSs Task Dependencies., , and . LCPC, volume 7760 of Lecture Notes in Computer Science, page 234-248. Springer, (2012)Coarse-Grain Performance Estimator for Heterogeneous Parallel Computing Architectures like Zynq All-Programmable SoC., , , , , , and . CoRR, (2015)LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing., , , , , , , , , and 35 other author(s). CoRR, (2019)Hurry-up: Scaling Web Search on Big/Little Multi-core Architectures., , , and . CoRR, (2019)An Overview of the Blue Gene/L System Software Organization., , , , , , , , , and 4 other author(s). Euro-Par, volume 2790 of Lecture Notes in Computer Science, page 543-555. Springer, (2003)Implementation of a hierarchical N-body simulator using the Ompss programming model., , and . IA3@SC, page 23-30. ACM, (2011)Kernel-level Scheduling for the Nano-threads Programming Model., , , , , and . International Conference on Supercomputing, page 337-344. ACM, (1998)Reducing data access latency in SDSM systems using runtime optimizations., , , , , , , and . CASCON, page 160-173. ACM, (2010)Work-efficient parallel non-maximum suppression for embedded GPU architectures., , , and . ICASSP, page 1026-1030. IEEE, (2016)