( en | de | ru )

 

Disambiguation of "Copeland, Miles A."

Author of the publication

copydeleteadd this publication to your clipboard
Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System.

, , , and . ISCAS, page 97-100. IEEE, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hubert Miles

Rebecca Copeland

Simon Miles

Benedict Miles

Murray Lewis Miles

 

Other publications of authors with the same name

A Second Order Delta-Sigma Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer., , , and . ISCAS, page 1689-1692. IEEE, (2007)A Sigma-Delta Frequency Discriminator Based Synthesizer., , , and . ISCAS, page 1-4. IEEE, (1995)A 1.9-GHz silicon receiver with monolithic image filtering., and . IEEE J. Solid State Circuits, 33 (3): 378-386 (1998)The modeling, characterization, and design of monolithic inductors for silicon RF IC's., and . IEEE J. Solid State Circuits, 32 (3): 357-369 (1997)A 1.9 GHz low-voltage silicon bipolar receiver front-end for wireless personal communications systems., and . IEEE J. Solid State Circuits, 30 (12): 1438-1448 (December 1995)VLSI for analog/digital communications.. IEEE Commun. Mag., 29 (5): 25-30 (1991)Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System., , , and . ISCAS, page 97-100. IEEE, (1995)A Sampled Analog MOS LSI Adaptive Filter., , and . IEEE Trans. Commun., 27 (2): 406-412 (1979)Comments, with reply, on 'Characterization and modeling of mismatch in MOS transistors for precision analog design'., , , , , and . IEEE J. Solid State Circuits, 23 (1): 294-296 (February 1988)A receive path ΔΣ frequency to digital converter., , , and . ISCAS, page 331-334. IEEE, (2000)