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Disambiguation of "Fesquet, Laurent"

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Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in Sensors.

, , and . ISVLSI, page 290-295. IEEE Computer Society, (2017)

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Laurent Ntahuga

Thomas Laurent

Laurent Bartholdi

Thomas Laurent

Laurent Herschke

 

Other publications of authors with the same name

A Novel Event Based Image Sensor with spacial and temporal redundancy suppression., , , and . NEWCAS, page 238-241. IEEE, (2020)Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems., , , , , and . ISCAS, page 1-5. IEEE, (2018)Low Phase-Noise CMOS Quadrature Oscillator based on (N × 4)-stage Self-Timed Ring., , , , and . DCIS, page 1-5. IEEE, (2018)Optical versus Electronic Bus for Address-Transactions in Future SMP Architectures., , , and . IEEE PACT, page 22-29. IEEE Computer Society, (1998)A Generic CDC Modeling for Data Stability Verification., , , and . ICECS, page 1-4. IEEE, (2023)N-Path Mixer with Wide Rejection Including the 7th Harmonic for Low Power Multi-standard Receivers., , , , , , , , , and 1 other author(s). NEWCAS, page 256-260. IEEE, (2022)A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions., , and . FDL (Selected Papers), volume 530 of Lecture Notes in Electrical Engineering, page 107-127. Springer, (2017)Simple tri-state logic Trojans able to upset properties of ring oscillators., , , and . DTIS, page 1-6. IEEE, (2016)Comparison of low-voltage scaling in synchronous and asynchronous FD-SOI circuits., , , and . PATMOS, page 229-234. IEEE, (2016)Distributed asynchronous controllers for clock management in low power systems., , , , , and . ICECS, page 379-382. IEEE, (2014)