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Statistical model order reduction for interconnect circuits considering spatial correlations.

J. Fan, N. Mi, S. Tan, Y. Cai, and X. Hong. DATE, page 1508-1513. EDA Consortium, San Jose, CA, USA, (2007)

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Jian Cai

Yongjie Cai

Xuediao Cai

Lijun Cai

Cai Berg

Other publications of authors with the same name

Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain.Y. Cai, J. Shi, Z. Luo, and X. Hong. J. Comput. Sci. Technol., 20 (2): 224-230 (2005)SUALD: Spacing uniformity-aware layout decomposition in triple patterning lithography.Z. Chen, H. Yao, and Y. Cai. ISQED, page 566-571. IEEE, (2013)Leakage power optimization for clock network using dual-Vth technology.W. Shen, Y. Cai, and X. Hong. ISCAS, page 2769-2772. IEEE, (2008)Evaluating a bounded slice-line grid assignment in O(nlogn) time.S. Chen, X. Hong, S. Dong, Y. Ma, Y. Cai, C. Cheng, and J. Gu. ISCAS (4), page 708-711. IEEE, (2003)A novel fine-grain track routing approach for routability and crosstalk optimization.Z. Qi, Q. Zhou, Y. Jia, Y. Cai, Z. Li, and H. Yao. ISQED, page 621-626. IEEE, (2011)A new splitting graph construction algorithm for SIAR router.J. Zhao, H. Yao, Y. Cai, and Q. Zhou. ASICON, page 1-4. IEEE, (2013)SIAR: splitting-graph-based interactive analog router.F. Yang, H. Yao, Q. Zhou, and Y. Cai. ACM Great Lakes Symposium on VLSI, page 367-370. ACM, (2011)A thermal-driven force-directed floorplanning algorithm for 3D ICs.Y. Huang, Q. Zhou, Y. Cai, and H. Yan. CAD/Graphics, page 497-502. IEEE, (2009)SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD Chips.Q. Wang, W. He, H. Yao, T. Ho, and Y. Cai. ISPD, page 49-56. ACM, (2015)Efficient model reduction of interconnects via double gramians approximation.B. Yan, S. Tan, G. Chen, and Y. Cai. ASP-DAC, page 25-30. IEEE, (2010)

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Disambiguation of "Cai, Yici"

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Statistical model order reduction for interconnect circuits considering spatial correlations.

Please choose a person to relate this publication to

Jian Cai

Yongjie Cai

Xuediao Cai

Lijun Cai

Cai Berg

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Cai, Yici"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Statistical model order reduction for interconnect circuits considering spatial correlations.

Please choose a person to relate this publication to

Jian Cai

Yongjie Cai

Xuediao Cai

Lijun Cai

Cai Berg

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Statistical model order reduction for interconnect circuits considering spatial correlations.