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AIM: Fast and energy-efficient AES in-memory implementation for emerging non-volatile main memory., , , , , и . DATE, стр. 625-628. IEEE, (2018)Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory., , , , , и . FPL, стр. 459-462. IEEE, (2008)Virtual-machine metadata optimization for I/O traffic reduction in mobile virtualization., , , , , и . NVMSA, стр. 1-2. IEEE, (2014)Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (4): 584-592 (2011)Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory., , , , , и . J. Syst. Archit., 59 (7): 389-399 (2013)Towards Independent On-device Artificial Intelligence., и . ISVLSI, стр. 351. IEEE, (2022)CORUSCANT: Fast Efficient Processing-in-Racetrack Memories., , , , , и . MICRO, стр. 784-798. IEEE, (2022)Developing a Miniature Energy-Harvesting-Powered Edge Device with Multi-Exit Neural Network., , , , , и . ISCAS, стр. 1-5. IEEE, (2021)Dynamic and Leakage Power Minimization with Loop Voltage Scheduling and Assignment., , , , и . EUC (1), стр. 192-198. IEEE Computer Society, (2008)Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence., , , , , и . ASP-DAC, стр. 85-90. IEEE, (2020)