Author of the publication

A Low Power Frequency Synthesizer for 60-GHz Wireless Personal Area Networks.

, , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 622-626 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 6.8mW 7.4Gb/s clock-forwarded receiver with up to 300MHz jitter tracking in 65nm CMOS., and . ISSCC, page 158-159. IEEE, (2010)A 79dB SNDR, 10MHz BW, 675MS/s open-loop time-based ADC employing a 1.15ps SAR-TDC., , and . A-SSCC, page 321-324. IEEE, (2016)High speed ADCs for wireline applications., , , and . MWSCAS, page 579-582. IEEE, (2017)Spectrally Efficient DMT Operation With BER-Informed Dynamic Bit and Power Loading., , , and . IEEE Access, (2022)A 40-Gb/s serial link transceiver in 28-nm CMOS technology., , , , , , , , , and 4 other author(s). VLSIC, page 1-2. IEEE, (2014)A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering., , , , , , , , , and 4 other author(s). VLSIC, page 1-2. IEEE, (2014)A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching., , , , , , , , , and . CICC, page 1-4. IEEE, (2012)A 27-Gb/s, 0.41-mW/Gb/s 1-tap predictive decision feedback equalizer in 40-nm low-power CMOS., , , , , and . CICC, page 1-4. IEEE, (2012)A Low Power Frequency Synthesizer for 60-GHz Wireless Personal Area Networks., , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 622-626 (2011)Channel adaptive ADC and TDC for 28 Gb/s PAM-4 digital receiver., , and . CICC, page 1-4. IEEE, (2017)