( en | de | ru )

 

Disambiguation of "Yu, Shimeng"

Author of the publication

copydeleteadd this publication to your clipboard
A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10-6 Native Bit Error Rate.

, , , , , , , , , , , , and . ISSCC, page 402-404. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Shimeng Chen

Yu-Ting Yu

Yu-Yu Su

Sze-Man Yu

Metal complexes with enolatoimine ligands for controlled olefin polymerizations. Uni Konstanz, (2009)

Hangxing Yu

 

Other publications of authors with the same name

Impact of Selector Devices in Analog RRAM-Based Crossbar Arrays for Inference and Training of Neuromorphic System., and . IEEE Trans. Very Large Scale Integr. Syst., 27 (9): 2205-2212 (2019)Low-VDD Operation of SRAM Synaptic Array for Implementing Ternary Neural Network., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (10): 2962-2965 (2017)Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM., , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (2): 386-396 (2021)Secure XOR-CIM Engine: Compute-In-Memory SRAM Architecture With Embedded XOR Encryption., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (12): 2027-2039 (2021)Improving efficiency in sparse learning with the feedforward inhibitory motif., , , , , , , and . Neurocomputing, (2017)Compute-in-Memory for AI: From Inference to Training.. VLSI-DAT, page 1. IEEE, (2020)Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain., , , , , , , , , and 5 other author(s). CoRR, (2018)Characterization and Mitigation of Relaxation Effects on Multi-level RRAM based In-Memory Computing., , , , , , and . IRPS, page 1-7. IEEE, (2021)Architectural Design of 3D NAND Flash based Compute-in-Memory for Inference Engine., , , and . MEMSYS, page 77-85. ACM, (2020)NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro., , , , and . AICAS, page 1-4. IEEE, (2021)