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Parallel VLSI architectures for real-time kinematics of redundant robots., and . J. Intell. Robotic Syst., 9 (1-2): 25-43 (1994)Special Issue on Artificial Intelligence at the Edge., and . IEEE Micro, 42 (6): 6-8 (2022)Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder., and . Integr., 44 (4): 305-315 (2011)Configurable LDPC Decoder Architectures for Regular and Irregular Codes., , and . J. Signal Process. Syst., 53 (1-2): 73-88 (2008)Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection., and . J. Signal Process. Syst., 95 (7): 845-861 (July 2023)Cooperative Partial Detection Using MIMO Relays., , , and . IEEE Trans. Signal Process., 59 (10): 5039-5049 (2011)Toward Length-Versatile and Noise-Robust Radio Frequency Fingerprint Identification., , , , and . IEEE Trans. Inf. Forensics Secur., (2023)Towards Scalable and Channel-Robust Radio Frequency Fingerprint Identification for LoRa., , , and . IEEE Trans. Inf. Forensics Secur., (2022)Layered Dynamic Fault Detection and Tolerance for Robots., , and . ICRA (2), page 180-187. IEEE Computer Society Press, (1993)Efficient complex matrix transformations with CORDIC., and . IEEE Symposium on Computer Arithmetic, page 122-129. IEEE Computer Society/, (1993)