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A Fast-Transient Wide-Voltage-Range Digital-Controlled Buck Converter With Cycle-Controlled DPWM.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (1): 17-25 (2016)

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The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers., and . ISCAS, page 2056-2059. IEEE, (2007)Fixed-point FIR filter design and implementation in the expanding subexpression space., and . ISCAS, page 185-188. IEEE, (2010)A -21.2-dBm Dual-Channel UHF Passive CMOS RFID Tag Design., and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (4): 1269-1279 (2014)A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL code., , , , and . ISCAS (4), page 277-280. IEEE, (2003)The design of asymmetrical square-root pulse-shaping filters with wide eye-openings., and . ISCAS, page 2665-2668. IEEE, (2008)A wide-range all-digital delay-locked loop using fast-lock variable SAR algorithm., , , and . ISPACS, page 338-342. IEEE, (2012)A 11.75-bit Hybrid Sturdy MASH-21 Δ-Σ Modulator for Audio Applications., and . ISPACS, page 1-2. IEEE, (2019)A Fast-Transient Wide-Voltage-Range Digital-Controlled Buck Converter With Cycle-Controlled DPWM., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (1): 17-25 (2016)The Design of Square-Root-Raised-Cosine FIR Filters by an Iterative Technique.. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (1): 241-248 (2007)Hardware Simplification to the Delta Path in a MASH 111 Delta-Sigma Modulator., and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (4): 270-274 (2009)