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Disambiguation of "Arafa, Yehia"

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Modeling and Characterizing Shared and Local Memories of the Ampere GPUs.

, , , , and . MEMSYS, page 9:1-9:3. ACM, (2023)

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Dana Yehia

Ahmed Yehia

Mohammed Arafa

Yehia Goneim

Raafat Arafa

 

Other publications of authors with the same name

Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation., , , , , and . SIGSIM-PADS, page 95-105. ACM, (2021)Modeling and Characterizing Shared and Local Memories of the Ampere GPUs., , , , and . MEMSYS, page 9:1-9:3. ACM, (2023)Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis., , , and . HPEC, page 1-8. IEEE, (2022)Verified instruction-level energy consumption measurement for NVIDIA GPUs., , , , , , , , and . CF, page 60-70. ACM, (2020)POSTER: GPUs Pipeline Latency Analysis., , , , and . ASAP, page 139. IEEE, (2019)Hybrid, scalable, trace-driven performance modeling of GPGPUs., , , , , , , and . SC, page 53. ACM, (2021)PPT-SASMM: Scalable Analytical Shared Memory Model: Predicting the Performance of Multicore Caches from a Single-Threaded Execution Trace., , , , , and . MEMSYS, page 341-351. ACM, (2020)NVIDIA GPGPUs Instructions Energy Consumption., , , , , , , , and . ISPASS, page 110-112. IEEE, (2020)Fault Tolerance Performance Evaluation of Large-Scale Distributed Storage Systems HDFS and Ceph Case Study., , , and . HPEC, page 1-7. IEEE, (2018)Fast, accurate, and scalable memory modeling of GPGPUs using reuse profiles., , , , , and . ICS, page 31:1-31:12. ACM, (2020)