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Disambiguation of "Papanikolaou, Antonis"

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Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's.

, , , , , , and . ARCS Workshops, page 319-324. VDE Verlag, (2010)

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Georgios Papanikolaou

Paschalis Papanikolaou

Apostolos Papanikolaou

Amalia Papanikolaou

Antonis Tsiongas

 

Other publications of authors with the same name

Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's., , , , , , and . ARCS Workshops, page 319-324. VDE Verlag, (2010)Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations., , , , , , , and . ACM Comput. Surv., 47 (3): 38:1-38:33 (2015)Topology exploration for energy efficient intra-tile communication., , and . ASP-DAC, page 178-183. IEEE Computer Society, (2007)Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm., , , , and . ICECS, page 715-718. IEEE, (2011)Interconnect exploration for future wire dominated technologies., , , , , , , and . SLIP, page 105-106. ACM, (2002)Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design., , , , , , , , and . VLSI-SoC, page 342-347. IEEE, (2006)3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot., , , , , , , , and . Proc. IEEE, 97 (1): 96-107 (2009)Physical design implementation of segmented buses to reduce communication energy., , , and . ASP-DAC, page 42-47. IEEE, (2006)Accelerating All-to-All Protein Structures Comparison with TMalign Using a NoC Many-Cores Processor Architecture., , and . IPDPS Workshops, page 510-519. IEEE, (2013)Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture., , , , , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 52-58. Springer, (2006)