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Disambiguation of "Haroun, Baher"

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A PWM Based Fully Integrated Digital Transmitter/PA for WLAN and LTE Applications.

, , , , and . IEEE J. Solid State Circuits, 50 (5): 1117-1125 (2015)

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Baher Husain

Wassem Baherli

Baher Mawlawi

Baher Molaoui

Najah Haroun

 

Other publications of authors with the same name

A 20mW 61dB SNDR (60MHz BW) 1b 3rd-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS., , , , and . ISSCC, page 158-160. IEEE, (2012)A PWM Based Fully Integrated Digital Transmitter/PA for WLAN and LTE Applications., , , , and . IEEE J. Solid State Circuits, 50 (5): 1117-1125 (2015)3.1 An Integrated BAW Oscillator with <±30ppm Frequency Stability Over Temperature, Package Stress, and Aging Suitable for High-Volume Production., , , , , , and . ISSCC, page 58-60. IEEE, (2020)Power estimation tool for sub-micron CMOS VLSI circuits., , and . ICCAD, page 204-209. IEEE Computer Society / ACM, (1992)A 0.5-to-400MHz Programmable BAW Oscillator with Fractional Output Divider Achieving 4ppm Frequency Stability over Temperature and <95fs Jitter., , , , , , , , , and 6 other author(s). ISSCC, page 70-71. IEEE, (2023)Floorplanning with Datapath Optimization., , and . ISCAS, page 41-44. IEEE, (1995)A Two Stage Structure for High Order Multi-Bit Sigma-Delta ADC with Multiplier-less Digital Correction Logic., and . ISCAS, page 9-12. IEEE, (1994)A Novel Reduced Swing CMOS Bus Interface Circuit for High Speed Low Power VLSI Systems., and . ISCAS, page 351-354. IEEE, (1994)Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses., and . FPGA, page 75-81. ACM, (1995)Session 16 overview: Switching power control techniques: Analog subcommittee., and . ISSCC, page 272-273. IEEE, (2012)