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A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs., , , , , , , , , и . DATE, стр. 605-608. IEEE, (2018)Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput., , , , и . VLSI-SoC, стр. 1-6. IEEE, (2021)Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level., и . CODES+ISSS, стр. 1-2. IEEE, (2023)Formal Analysis of Camouflaged Reconfigurable Circuits., , , , , , и . NEWCAS, стр. 1-5. IEEE, (2023)Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits., , , , , , и . DATE, стр. 169-174. IEEE, (2016)DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies., , , и . DATE, стр. 674-677. IEEE, (2020)END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator., , , , , , , и . VLSI-SoC (Selected Papers), том 661 из IFIP Advances in Information and Communication Technology, стр. 175-203. Springer, (2021)Technology mapping flow for emerging reconfigurable silicon nanowire transistors., , и . DATE, стр. 767-772. IEEE, (2018)AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs., , , , и . FPT, стр. 1-6. IEEE, (2021)Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach., , , и . DATE, стр. 23-28. IEEE, (2022)