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Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques.

, and . ASP-DAC, ACM, (1995)

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Bounds on net lengths for high-speed PCB., , and . ICCAD, page 73-76. IEEE Computer Society / ACM, (1993)Timing Constraints for Correct Performance., and . ICCAD, page 24-27. IEEE Computer Society, (1990)Net criticality revisited: an effective method to improve timing in physical design., , , , , and . ISPD, page 155-160. ACM, (2002)Performance Driven Technology Mapper for FPGAs with Complex Logic Block Structures., and . ISCAS, page 1219-1222. IEEE, (1995)Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques., and . ASP-DAC, ACM, (1995)Bounds on Net Delays for Physical Design of Fast Circuits., , and . VLSI, volume A-1 of IFIP Transactions, page 111-118. North-Holland, (1991)A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstacles., , , and . ICECS, page 781-784. IEEE, (2002)Iterative-Constructive Standard Cell Placer for High Speed and Low Power., and . ICCD, page 350-355. IEEE, (2006)Critical path issue in VLSI design., , and . ICCAD, page 520-523. IEEE Computer Society, (1989)Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement., and . DAC, page 632-635. ACM, (1991)