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Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes., , , и . ICICS, том 5927 из Lecture Notes in Computer Science, стр. 47-62. Springer, (2009)Wave-pipelined multiplexed (WPM) routing for gigascale integration (GSI)., и . IEEE Trans. Very Large Scale Integr. Syst., 13 (8): 899-910 (2005)Efficient Sealable Protection Keys for RISC-V., , , и . CoRR, (2020)Neural network-based accelerators for transcendental function approximation., , , и . ACM Great Lakes Symposium on VLSI, стр. 169-174. ACM, (2014)Thermal management of manycore systems with silicon-photonic networks., , , и . DATE, стр. 1-6. European Design and Automation Association, (2014)SealPK: Sealable Protection Keys for RISC-V., , , и . DATE, стр. 1278-1281. IEEE, (2021)Express Virtual Channels with Taps (EVC-T): A Flow Control Technique for Network-on-Chip (NoC) in Manycore Systems., , , и . Hot Interconnects, стр. 1-10. IEEE Computer Society, (2011)HEAP: A Fully Homomorphic Encryption Accelerator with Parallelized Bootstrapping., , и . ISCA, стр. 756-769. IEEE, (2024)Network-on-Chip Microarchitecture-based Covert Channel in GPUs., , , , , , , и . MICRO, стр. 565-577. ACM, (2021)NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator., , , , , , , и . ISCA, стр. 946-960. IEEE, (2024)