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A novel wavelet method for noise analysis of nonlinear circuits.

, , , , и . ASP-DAC, стр. 471-476. ACM Press, (2005)

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Dian Handayani

Zhou Zhou

Mahmud Dianati

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Marco Alberto Diana

 

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Frequency driven repeater insertion for deep submicron., , , и . ISCAS (5), стр. 181-184. IEEE, (2004)Optimization of VLSI Allocation., и . ISCAS, стр. 1065-1068. IEEE, (1995)Propagation Delay in RLC Interconnection Networks., и . ISCAS, стр. 2125-2128. IEEE, (1993)An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles., и . ISCAS (6), стр. 258-261. IEEE, (1999)RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect., , , и . ISCAS, стр. 2710-2713. IEEE, (2007)FMSSQP: An efficient global optimization tool for the robust design of Rail-to-Rail Op-Amp., , , и . ASICON, стр. 1-4. IEEE, (2013)Efficient SVM-based hotspot detection using spectral clustering., , , и . ISCAS, стр. 1-4. IEEE, (2017)Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design., , , , и . ICML, том 80 из Proceedings of Machine Learning Research, стр. 3312-3320. PMLR, (2018)Correlated Rare Failure Analysis via Asymptotic Probability Evaluation., , , , , и . DAC, стр. 54:1-54:6. ACM, (2017)An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling., , , , , и . DATE, стр. 67-72. IEEE, (2020)