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A novel hybrid FIFO asynchronous clock domain crossing interfacing method., , , и . ACM Great Lakes Symposium on VLSI, стр. 271-274. ACM, (2012)Analysis of SEU Propagation in Combinational Circuits at RTL Based on Satisfiability Modulo Theories., , , и . ACM Great Lakes Symposium on VLSI, стр. 239-244. ACM, (2017)Mechanizing a pi-Calculus Equivalence in HOL.. TPHOLs, том 971 из Lecture Notes in Computer Science, стр. 1-16. Springer, (1995)Probabilistic model checking based DAL analysis to optimize a combined TMR-blind-scrubbing mitigation technique for FPGA-based aerospace applications., , , и . MEMOCODE, стр. 175-184. IEEE, (2014)Formal Methods Based Synthesis of Single Event Transient Tolerant Combinational Circuits., , и . J. Electron. Test., 33 (5): 607-620 (2017)Towards a Classification of Log Parsing Errors., , , и . ICPC, стр. 84-88. IEEE, (2023)Coverage Driven Test Generation and Consistency Algorithm., и . KDPD, том 8439 из Lecture Notes in Computer Science, стр. 136-151. Springer, (2013)META: A Layout Based Tool to Estimate the Vulnerability of Digital Circuits to Multiple Event Transient., , и . NEWCAS, стр. 450-454. IEEE, (2022)Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications., , и . ISCAS, стр. 417-420. IEEE, (2007)FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks., и . ACM Great Lakes Symposium on VLSI, стр. 422-425. ACM, (2005)