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Disambiguation of "Lai, Mingche"

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In-Band Management Framework and Performance Evaluation for Interconnect Network in the TianHe Exascale Prototype System.

, , , , and . HPCC/DSS/SmartCity/DependSys, page 438-445. IEEE, (2022)

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Eugen Lai

Waltraud Lai

Mao Lai

Xin Lai

Yinchieh Lai

 

Other publications of authors with the same name

A Low-Latency and High-Throughput Multiple-Level Arbitration Scheme Supporting Quality-of-Service in Optical On-chip Network., , and . NoCArc@MICRO, page 9-14. ACM, (2015)Design of Converged Network Coding Layer for the Ethernet and HPC High-Speed Network., , , and . HPCC/DSS/SmartCity, page 163-169. IEEE, (2020)Optimal Implementation of In-Band Network Management for High-Radix Switches., , , , and . ACA, volume 1256 of Communications in Computer and Information Science, page 16-30. Springer, (2020)A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3787-3791 (October 2023)PFT: A Congestion Avoidance Method based on Proactive Flow Throttling at Endpoints., , , , , and . IM, page 572-578. IEEE, (2021)In-Band Management Framework and Performance Evaluation for Interconnect Network in the TianHe Exascale Prototype System., , , , and . HPCC/DSS/SmartCity/DependSys, page 438-445. IEEE, (2022)PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction., , , , and . ICA3PP (1), volume 11944 of Lecture Notes in Computer Science, page 3-16. Springer, (2019)A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology., , , , , , , , and . ACA, volume 1256 of Communications in Computer and Information Science, page 31-42. Springer, (2020)A High-Radix Switch Architecture Based on Silicon Photonic and 3D Integration., , , and . NCCET, volume 666 of Communications in Computer and Information Science, page 179-190. Springer, (2016)Artificial Neural Network Based on Memristive Circuit for High-Speed Equalization., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (4): 1745-1756 (April 2024)