( en | de | ru )

 

Disambiguation of "Sommer, Lukas"

Author of the publication

copydeleteadd this publication to your clipboard
Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application.

, , , , and . H2RC@SC, page 21-32. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Lukas Max Friedrich Sommer

Charlotte Lukas

Hans Lukas

Siegmar Lukas

Klaus Lukas

 

Other publications of authors with the same name

Extending High-Level Synthesis with High-Performance Computing Performance Visualization., , , , and . CLUSTER, page 371-380. IEEE, (2020)Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design., , , and . ROSS@SC, page 22-30. IEEE, (2020)Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators., , , , , and . ICCD, page 350-357. IEEE Computer Society, (2018)High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud., , , , and . H2RC@SC, page 26-33. IEEE, (2019)Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language., , , and . CGO, page 278-279. IEEE, (2019)Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study., , , and . PDP, page 17-21. IEEE, (2020)Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs., , , and . FCCM, page 75-83. IEEE, (2020)Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application., , , , and . H2RC@SC, page 21-32. IEEE, (2021)Leveraging MLIR for Better SYCL Compilation (Poster)., , , , , , , and . IWOCL, page 21:1. ACM, (2023)Experiences Building an MLIR-Based SYCL Compiler., , , , , , , and . CGO, page 399-410. IEEE, (2024)