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Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion., , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1057-1061. Springer, (2004)Extending RISC-V Processor Datapaths with Multi-Grain Reconfigurable Overlays., , , and . DCIS, page 1-6. IEEE, (2022)Message from the chairs., , , and . ReCoSoC, page 1. IEEE, (2015)A dynamic communication strategy for the distributed ATPG system DPLATON., , , and . EURO-DAC, page 271-276. IEEE Computer Society, (1993)Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems., , , , , and . ReConFig, page 164-169. IEEE Computer Society, (2011)A Modular Peripheral to Support Self-Reconfiguration in SoCs., , , , and . DSD, page 88-95. IEEE Computer Society, (2010)Power-aware multi-objective evolvable hardware system on an FPGA., , , and . AHS, page 61-68. IEEE, (2014)A digital system to emulate wireless networks., , , and . IET Comput. Digit. Tech., 1 (5): 444-450 (2007)Accelerating the evolution of a systolic array-based evolvable hardware system., and . Microprocess. Microsystems, (2018)Automatic generation of identical routing pairs for FPGA implemented DPL logic., , , and . ReConFig, page 1-6. IEEE, (2012)