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Composable Cachelets: Protecting Enclaves from Cache Side-Channel Attacks.

, , , , and . USENIX Security Symposium, page 2839-2856. USENIX Association, (2022)

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Efficiently Securing Systems from Code Reuse Attacks., , , and . IEEE Trans. Computers, 63 (5): 1144-1156 (2014)Basic introduction to higher-spin theories. (2022)cite arxiv:2206.15385Comment: 155 pages, minor corrections, references added.SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors., and . PACT, page 43-54. IEEE, (2019)SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency., , , and . PACT, page 265-274. ACM, (2006)A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors., , , and . ICCD, page 118-121. IEEE Computer Society, (2002)SCRAP: Architecture for signature-based protection from Code Reuse Attacks., , , , and . HPCA, page 258-269. IEEE Computer Society, (2013)Composable Cachelets: Protecting Enclaves from Cache Side-Channel Attacks., , , , and . USENIX Security Symposium, page 2839-2856. USENIX Association, (2022)PowerVisor: A Toolset for Visualizing Energy Consumption and Heat Dissipation Processes in Modern Processor Architectures., , and . PaCT, volume 7979 of Lecture Notes in Computer Science, page 149-153. Springer, (2013)SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation., , , , , and . DAC, page 60. ACM, (2019)Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation., , , , , and . SIGSIM-PADS, page 95-105. ACM, (2021)