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Disambiguation of "Balsara, Poras T."

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A 550-MSample/s 8-Tap FIR digital filter for magnetic recording read channels.

, , and . IEEE J. Solid State Circuits, 35 (8): 1205-1210 (2000)

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Nisha Balsara

T Masselink

T Attin

T Weber

T Hollemann

 

Other publications of authors with the same name

FPGA Architecture for Standby Power Management., , , and . FPT, page 181-188. IEEE, (2005)IIP2 requirements in 4G LTE handset receivers., , and . MWSCAS, page 1132-1135. IEEE, (2013)Effect of sampling time and sampling instant on the frequency response of a boost converter., , and . IECON, page 7155-7160. IEEE, (2016)A 550-MSample/s 8-Tap FIR digital filter for magnetic recording read channels., , and . IEEE J. Solid State Circuits, 35 (8): 1205-1210 (2000)Bidirectional Single-Supply Level Shifter with Wide Voltage Range for Efficient Power Management., , , and . VLSI Design, page 125-130. IEEE Computer Society, (2012)Exploring Logic Block Granularity in Leakage Tolerant FPGA., , , and . VLSI Design, page 754-757. IEEE Computer Society, (2006)A Wide-Range, High-Resolution, Compact CMOS, Time to Digital Converter., and . VLSI Design, page 197-202. IEEE Computer Society, (2006)A Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for Wireless Transmitters., , , and . ISCAS, page 3275-3278. IEEE, (2007)Design and Implementation of Configurable W-CDMA Rake Receiver Architectures on FPGA., , and . IPDPS, IEEE Computer Society, (2005)VHDL Simulation and Modeling of an All-Digital RF Transmitter., , and . IWSOC, page 233-238. IEEE Computer Society, (2005)