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Efficient Large Scale DLRM Implementation on Heterogeneous Memory Systems., , and . ISC, volume 13948 of Lecture Notes in Computer Science, page 42-61. Springer, (2023)The Davis In-Order (DINO) CPU: A Teaching-focused RISC-V CPU Design., and . WCAE@ISCA, page 2:1-2:8. ACM, (2019)The Tribes of Machine Learning and the Realm of Computer Architecture., and . CoRR, (2020)Enabling scalable chiplet-based uniform memory architectures with silicon photonics., , , and . MEMSYS, page 222-334. ACM, (2019)HTA: A Scalable High-Throughput Accelerator for Irregular HPC Workloads., , , , , and . ISC, volume 12728 of Lecture Notes in Computer Science, page 176-194. Springer, (2021)Potential and Limitation of High-Frequency Cores and Caches., , and . CoRR, (2024)SoK: Limitations of Confidential Computing via TEEs for High-Performance Compute Systems., , , and . SEED, page 121-132. IEEE, (2022)Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems., , and . ISPASS, page 340-342. IEEE, (2023)Enabling Reproducible and Agile Full-System Simulation., , , , , , , , and . ISPASS, page 183-193. IEEE, (2021)Filtering Translation Bandwidth with Virtual Caching., , and . ASPLOS, page 113-127. ACM, (2018)