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Compiler and System Techniques for soc Distributed Reconfigurable Accelerators., , , , , , , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 293-302. Springer, (2004)Using interoperability mode in SYCL 2020., , , , and . IWOCL, page 21:1. ACM, (2022)SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation., , , , and . RAPIDO, page 9-16. ACM, (2012)Early experiments using SYCL single-source modern C++ on Xilinx FPGA: Extended Abstract of Technical Presentation., and . IWOCL, page 18:1-18:8. ACM, (2018)A single-source C++20 HLS flow for function evaluation on FPGA and beyond., , , and . HEART, page 51-58. ACM, (2022)Co-Design of Massively Parallel Embedded Processor Architectures., , , , , , , , , and 2 other author(s). ReCoSoC, page 27-34. Univ. Montpellier II, (2005)Tutorial: SYCL Techniques and Best Practices., , , , and . IWOCL, page 16:1. ACM, (2023)Activity Counter: New Optimization for the Dynamic Scheduling of SIMD Control Flow., and . ICPP (2), page 184-187. CRC Press, (1993)Building Retargetable and Efficient Compilers for Multimedia Instruction Sets., , and . PACT, page 169-170. IEEE Computer Society, (2011)Tutorial: Application Development with SYCL., , , , , and . IWOCL, page 4:1. ACM, (2022)