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A Selective Read-before-Write Scheme for Energy-Aware Spin Torque Transfer RAM (STT-RAM) Cache Design.

, , , and . Journal of Circuits, Systems, and Computers, (2013)

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A Selective Read-before-Write Scheme for Energy-Aware Spin Torque Transfer RAM (STT-RAM) Cache Design., , , and . Journal of Circuits, Systems, and Computers, (2013)Thermal-Aware Feedback Control Scheduling for Soft Real-time Systems., , , , and . HPCC-ICESS, page 1479-1486. IEEE Computer Society, (2012)WAP: The Warp Feature Aware Prefetching Method for LLC on CPU-GPU Heterogeneous Architecture., , , , , and . HPCC/SmartCity/DSS, page 414-421. IEEE Computer Society, (2016)LLC Buffer for Arbitrary Data Sharing in Heterogeneous Systems., , , , , and . HPCC/SmartCity/DSS, page 260-267. IEEE Computer Society, (2016)CWC: A Companion Write Cache for Energy-Aware Multi-Level Spin-Transfer Torque RAM Cache Design., , , and . Journal of Circuits, Systems, and Computers, 24 (6): 1550079:1-1550079:16 (2015)Leakage Aware Scheduling for Maximum Temperature Minimization., , , and . PDCAT, page 245-250. IEEE Computer Society, (2011)PZSPTF: Parallelism-aware and Zone-based Shortest Positioning TimeFirst Scheduling for MEMS-based Storage Devices., , , and . PerCom, page 633-638. IEEE Computer Society, (2008)SPMTM: A Novel ScratchPad Memory Based Hybrid Nested Transactional Memory Framework., , , , , and . APPT, volume 5737 of Lecture Notes in Computer Science, page 67-81. Springer, (2009)Enable back memory and global synchronization on LLC buffer., , , , , and . J. Supercomput., 73 (12): 5414-5439 (2017)Dealing with the Functional Units Starvation in SMT., , , and . HPCC-ICESS, page 208-215. IEEE Computer Society, (2012)