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Disambiguation of "Bae, Sang-Geun"

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3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop.

, , , and . IEEE J. Solid State Circuits, 52 (2): 605-610 (2017)

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Jun-Sang Bae

Sang Bin Bae

Sang-Won Bae

Soonil Bae

Geun Kang

 

Other publications of authors with the same name

A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (10): 1132-1136 (2017)12-Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling With No Data Overhead and Spread Transition Scheme for 8K UHD Intra-Panel Interfaces., , , , , , and . IEEE J. Solid State Circuits, 54 (2): 463-475 (2019)A ΔΣ Modulator-Based Spread-Spectrum Clock Generator with Digital Compensation and Calibration for Phase-Locked Loop Bandwidth., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (2): 192-196 (2019)A Spread Spectrum Clock Generator With Nested Modulation Profile for a High-Resolution Display System., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1509-1513 (2018)An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (3): 1092-1103 (2016)A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (6): 650-654 (2017)An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect., , and . IEICE Electron. Express, 11 (15): 20140490 (2014)29.5 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces., , , , , , and . ISSCC, page 490-491. IEEE, (2017)3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop., , , and . IEEE J. Solid State Circuits, 52 (2): 605-610 (2017)