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Disambiguation of "Huang, Jing-Reng"

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Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm.

, , and . DFT, page 117-128. IEEE Computer Society, (2002)

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Jing Huang

German Reng

Diana Reng

Ingo Reng

Barbara Reng

 

Other publications of authors with the same name

A low-cost CMOS time interval measurement core., , , and . ISCAS (4), page 190-193. IEEE, (2001)A realistic fault model for flash memories., , and . Asian Test Symposium, page 274-281. IEEE Computer Society, (2000)Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses., , and . VTS, page 204-209. IEEE Computer Society, (2001)A programmable built-in self-test core for embedded memories., , and . ASP-DAC, page 11-12. ACM, (2000)Test Scheduling and Test Access Architecture Optimization for System-on-Chip., , , , , , and . Asian Test Symposium, page 411-. IEEE Computer Society, (2002)Test Scheduling of BISTed Memory Cores for SOC., , , , , , and . Asian Test Symposium, page 356-. IEEE Computer Society, (2002)BRAINS: A BIST Compiler for Embedded Memories., , , , , and . DFT, page 299-. IEEE Computer Society, (2000)Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm., , and . DFT, page 117-128. IEEE Computer Society, (2002)A built-in timing parametric measurement unit., , , and . ITC, page 315-322. IEEE Computer Society, (2001)An FPGA-based re-configurable functional tester for memory chips., , , and . Asian Test Symposium, page 51-57. IEEE Computer Society, (2000)