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Logic and Memory Design Based on Unequal Error Protection for Voltage-scalable, Robust and Adaptive DSP Systems., , и . J. Signal Process. Syst., 68 (3): 415-431 (2012)Exploiting application resiliency for energy-efficient and adequately-reliable operation., , и . IOLTS, стр. 249. IEEE, (2013)Enhancing Design Space Exploration by Extending CPU/GPU Specifications onto FPGAs, , , , , , , , , и . ACM Trans. Embedded Comput. Syst., 14 (2): 33:1--33:23 (2015)ACOR: On the Design of Energy-Efficient Autocorrelation for Emerging Edge Applications., и . ICCAD, стр. 1-9. IEEE, (2023)On the Facilitation of Voltage Over-Scaling and Minimization of Timing Errors in Floating-Point Multipliers., и . IOLTS, стр. 1-7. IEEE, (2023)Energy-Efficient Short-Time Fourier Transform for Partial Window Overlapping., , и . ISCAS, стр. 1-5. IEEE, (2023)DRAM Characterization under Relaxed Refresh Period Considering System Level Effects within a Commodity Server., , , и . IOLTS, стр. 236-239. IEEE, (2018)Heterogeneous Error-Resilient Scheme for Spectral Analysis in Ultra-Low Power Wearable Electrocardiogram Devices., , , , и . ISVLSI, стр. 268-273. IEEE Computer Society, (2015)HaRMony: Heterogeneous-Reliability Memory and QoS-Aware Energy Management on Virtualized Servers., , , и . ASPLOS, стр. 575-590. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..A Compressed and Accurate Sparse Deep Learning-based Workload-Aware Timing Error Model., и . ICCD, стр. 9-12. IEEE, (2023)