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ESSPER: Elastic and Scalable System for High-Performance Reconfigurable Computing with Software-bridged APIs.

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A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI., , , , , , , , and . IEICE Trans. Electron., 99-C (6): 632-640 (2016)Hardware Specialization: Estimating Monte Carlo Cross-Section Lookup Kernel Performance and Area., , , , , , and . SC Workshops, page 1274-1278. ACM, (2023)Performance Analysis of Hardware-Based Numerical Data Compression on Various Data Formats., , and . DCC, page 345-354. IEEE, (2018)Multifacets of lossy compression for scientific data in the Joint-Laboratory of Extreme Scale Computing., , , , , , , , , and 10 other author(s). Future Gener. Comput. Syst., (2025)FPGA-based Stream Computing for High-Performance N-Body Simulation using Floating-Point DSP Blocks., , and . HEART, page 16:1-16:6. ACM, (2017)Bandwidth Compression of Floating-Point Numerical Data Streams for FPGA-Based High-Performance Computing., , and . ACM Trans. Reconfigurable Technol. Syst., 10 (3): 18:1-18:22 (2017)ESSPER: Elastic and Scalable FPGA-Cluster System for High-Performance Reconfigurable Computing with Supercomputer Fugaku., , , and . HPC Asia, page 140-150. ACM, (2023)Effective digitized spatial size of unit dipole field in Quantitative Susceptibility Mapping., , and . EMBC, page 1049-1052. IEEE, (2013)20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding., , , , , , , , , and 4 other author(s). ISSCC, page 346-347. IEEE, (2014)Virtual Circuit-Switching Network with Flexible Topology for High-Performance FPGA Cluster., , and . ASAP, page 41-48. IEEE, (2021)