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Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs., , , and . ACM Trans. Design Autom. Electr. Syst., 17 (3): 34:1-34:22 (2012)Autonomous vehicle routing in multiple intersections., and . ASP-DAC, page 585-590. ACM, (2019)Timing-aware clock gating of pulsed-latch circuits for low power design., and . VLSI-DAT, page 1-4. IEEE, (2013)A nonlinear optimization methodology for resistor matching in analog integrated circuits., , and . VLSI-DAT, page 1-4. IEEE, (2012)Triangle-based process hotspot classification with dummification in EUVL., , , and . VLSI-DAT, page 1-4. IEEE, (2014)Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping., , , and . DAC, page 141:1-141:6. ACM, (2015)Placement of Digital Microfluidic Biochips via a New Evolutionary Algorithm., , , and . ACM Trans. Design Autom. Electr. Syst., 26 (6): 42:1-42:22 (2021)Obstacle-Avoiding Wind Turbine Placement for Power Loss and Wake Effect Optimization., , , and . ACM Trans. Design Autom. Electr. Syst., 22 (1): 5:1-5:24 (2016)AutoVP: An Automated Visual Prompting Framework and Benchmark., , , , and . CoRR, (2023)A Novel Confidence Induced Class Activation Mapping for MRI Brain Tumor Segmentation., , and . CoRR, (2023)