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Sub-20 nm design technology co-optimization for standard cell logic., , , и . ICCAD, стр. 124-131. IEEE, (2014)Exploiting Challenges of Sub-20 nm CMOS for Affordable Technology Scaling.. CoRR, (2015)Boreas: A Cost-Effective Mitigation Method for Advanced Hotspots using Machine Learning and Hardware Telemetry., , , , , и . ISPASS, стр. 295-305. IEEE, (2023)A synthesis methodology for application-specific logic-in-memory designs., , , , и . DAC, стр. 196:1-196:6. ACM, (2015)Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack., , и . DAC, стр. 156:1-156:6. ACM, (2014)Design Automation Framework for Application-Specific Logic-in-Memory Blocks., , , , , и . ASAP, стр. 125-132. IEEE Computer Society, (2012)Building trusted ICs using split fabrication., , , , и . HOST, стр. 1-6. IEEE Computer Society, (2014)Efficient and secure intellectual property (IP) design with split fabrication., , , , , и . HOST, стр. 13-18. IEEE Computer Society, (2014)HotGauge: A Methodology for Characterizing Advanced Hotspots in Modern and Next Generation Processors., , , , , и . IISWC, стр. 163-175. IEEE, (2021)