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Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems.

, and . ACM Trans. Reconfigurable Technol. Syst., 6 (2): 11:1-11:18 (2013)

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Auto-Tuning for GPGPU Applications Using Performance and Energy Model., , and . ICS, volume 274 of Frontiers in Artificial Intelligence and Applications, page 195-204. IOS Press, (2014)Scheduling System Verification., , and . TACAS, volume 1579 of Lecture Notes in Computer Science, page 19-33. Springer, (1999)Learning-based adaptation to applications and environments in a reconfigurable Network-on-Chip., , and . DATE, page 381-386. IEEE Computer Society, (2010)Model-based Verification of Safety-Critical Systems., and . SEKE, page 596-601. (2005)Software-Controlled Dynamically Swappable Hardware Design in Partially Reconfigurable Systems., and . EURASIP J. Embed. Syst., (2008)Model Checking Prioritized Timed Automata., , , and . ATVA, volume 3707 of Lecture Notes in Computer Science, page 370-384. Springer, (2005)Model Checking Timed Systems with Urgencies., , , , , , , and . ATVA, volume 4218 of Lecture Notes in Computer Science, page 67-81. Springer, (2006)Parallel implementation of convolution encoder for software defined radio on DSP architecture., , , , , and . ICSAMOS, page 180-186. IEEE, (2009)Compositional Automata Reduction with Non-critical Path Slicing., , , , and . FCS, page 133-138. CSREA Press, (2009)Synchronization-Aware Dynamic Thread Scheduling for Improving Performance and Saving Energy in Multi-core Embedded Systems., , and . PAAP, page 13-18. IEEE, (2012)