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A logic based approach to hardware abstraction., , and . FPGA, page 238. ACM, (2003)A single-FPGA implementation of image connected component labelling., , , and . FPGA, page 238. ACM, (2003)Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications., and . ERSA, page 285-288. CSREA Press, (2008)High performance FPGA-based core for BLAST sequence alignment with the two-hit method., , and . BIBE, page 1-7. IEEE, (2008)Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer., and . FPT, page 81-88. IEEE, (2008)HIDE: a logic based hardware intelligent description environment., , and . FPT, page 174-180. IEEE, (2002)Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs., , , , , and . ERSA, page 211-217. CSREA Press, (2010)Reconfiguration-based implementation of SVM classifier on FPGA for Classifying Microarray data., , and . EMBC, page 3058-3061. IEEE, (2013)Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA., , and . FCCM, page 190-198. IEEE Computer Society, (2001)Data coding functions for Software Defined Radios implemented on R3TOS., , , , and . FPL, page 33-40. IEEE, (2012)