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Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions.

, , and . DSD, page 696-703. IEEE Computer Society, (2006)

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A Multi-level Routing Scheme and Router Architecture to Support Hierarchical Routing in Large Network on Chip Platforms., , and . Euro-Par Workshops, volume 6586 of Lecture Notes in Computer Science, page 153-161. Springer, (2010)Automatic Synthesis of Microprogrammed Control Units from Behavioral Descriptions., , , and . DAC, page 147-154. ACM Press, (1989)Swarm Intelligence Inspired Classifiers in Comparison with Fuzzy and Rough Classifiers: A Remote Sensing Approach., , , and . IC3, volume 40 of Communications in Computer and Information Science, page 284-294. Springer, (2009)Junction based routing: a scalable technique to support source routing in large NoC platforms., , and . NoCArc@MICRO, page 45-50. ACM, (2012)An Abstraction to Support Design of Deadlock-free Routing Algorithms for Large and Hierarchical NoCs., and . CIT, page 59-66. IEEE Computer Society, (2011)An HOL based framework for design of correct high level synthesizers., , and . VLSI Design, page 249-254. IEEE Computer Society, (1995)A Partitioning Scheme For Multiple Pla Based Control Part Synthesis In Ideas., , and . VLSI Design, page 181-186. IEEE Computer Society, (1992)Evaluation of Various Routing Architectures for Multi-FPGA Boards., , and . VLSI Design, page 262-267. IEEE Computer Society, (2000)Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing., , and . IEEE International Workshop on Rapid System Prototyping, page 66-. IEEE Computer Society, (2002)A heuristic search strategy for optimization of trade-off cost measures., , and . ICTAI, page 400-407. IEEE Computer Society, (1991)