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Disambiguation of "García-Redondo, Fernando"

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ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.

, , , , , , , , , and . IEEE Micro, 42 (6): 76-87 (2022)

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Fernando Diaz García

Fernando García Amarelle

Fernando Mauricio García Leguizamón

Hugo Fernando Hernández García

Luisa García García

 

Other publications of authors with the same name

A Compact Model for Scalable MTJ Simulation., , , and . CoRR, (2021)Applications of Computation-In-Memory Architectures based on Memristive Devices., , , , , , , , , and 3 other author(s). DATE, page 486-491. IEEE, (2019)Training DNN IoT Applications for Deployment On Analog NVM Crossbars., , and . IJCNN, page 1-8. IEEE, (2020)A Time-Domain Current-Mode MAC Engine for Analogue Neural Networks in Flexible Electronics., , , and . BioCAS, page 1-4. IEEE, (2019)A Fokker-Planck Solver to Model MTJ Stochasticity., , and . ESSDERC, page 263-266. IEEE, (2021)27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power., , , , , , , , , and 1 other author(s). ISSCC, page 422-424. IEEE, (2020)Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm., , and . NANOARCH, page 112-117. IEEE Computer Society, (2015)MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array., , , , , , , , , and 1 other author(s). ICECS, page 1-5. IEEE, (2023)STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes., , , , , , , , and . ESSDERC, page 97-100. IEEE, (2023)-17 dBm Differential charge pump EPC Gen2 UHF RFID demodulator for 9 dB receive sensitivity boost., , , , and . A-SSCC, page 1-3. IEEE, (2021)