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Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating.

Y. Yakubo, K. Furutani, K. Toyotaka, H. Katagiri, M. Fujita, M. Kozuma, Y. Ando, Y. Kurokawa, T. Nakura, and S. Yamazaki. ISSCC, page 212-213. IEEE, (2023)

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Satoko Yamazaki

Noboru Yamazaki

Asuka Yamazaki

Other publications of authors with the same name

A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.T. Ishizu, Y. Yakubo, K. Furutani, A. Isobe, M. Fujita, T. Atsumi, Y. Ando, T. Murakawa, K. Kato, M. Fujita and 1 other author(s). VLSI Circuits, page 48-. IEEE, (2019)Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM.H. Inoue, T. Hirose, T. Mizuguchi, Y. Komura, T. Saito, M. Ito, K. Kimura, T. Onuki, Y. Ando, H. Sawai and 6 other author(s). IMW, page 1-4. IEEE, (2024)Liquid crystal display device and method for manufacturing the sameS. Yamazaki, T. Takayama, and L. Co.. (20040305)16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.T. Matsuzaki, T. Onuki, S. Nagatsuka, H. Inoue, T. Ishizu, Y. Ieda, N. Yamade, H. Miyairi, M. Sakakura, T. Atsumi and 7 other author(s). ISSCC, page 1-3. IEEE, (2015)Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.T. Onuki, W. Uesugi, H. Tamura, A. Isobe, Y. Ando, S. Okamoto, K. Kato, T. Yew, C. Lin, J. Wu and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor.H. Tamura, K. Kato, T. Ishizu, W. Uesugi, A. Isobe, N. Tsutsui, Y. Suzuki, Y. Okazaki, Y. Maehashi, J. Koyama and 5 other author(s). IEEE Micro, 34 (6): 42-53 (2014)A 20ns-write 45ns-read and 1014-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.S. Maeda, S. Ohshita, K. Furutani, Y. Yakubo, T. Ishizu, T. Atsumi, Y. Ando, D. Matsubayashi, K. Kato, T. Okuda and 2 other author(s). ISSCC, page 484-486. IEEE, (2018)Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating.Y. Yakubo, K. Furutani, K. Toyotaka, H. Katagiri, M. Fujita, M. Kozuma, Y. Ando, Y. Kurokawa, T. Nakura, and S. Yamazaki. ISSCC, page 212-213. IEEE, (2023)1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.Y. Okamoto, Y. Komura, T. Mizuguchi, T. Saito, M. Ito, K. Kimura, T. Onuki, Y. Ando, H. Sawai, T. Murakawa and 6 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)UHF RFCPUs on Flexible and Glass Substrates for Secure RFID Systems.Y. Kurokawa, T. Ikeda, M. Endo, H. Dembo, D. Kawae, T. Inoue, M. Kozuma, D. Ohgarane, S. Saito, K. Dairiki and 9 other author(s). ISSCC, page 574-575. IEEE, (2007)

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Disambiguation of "Yamazaki, Shunpei"