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Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization.

, , , and . ISCAS, page 1-5. IEEE, (2021)

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A 12.8 GB/S Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems., , , , , , , and . VLSI Circuits, page 149-150. IEEE, (2018)Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision., , , , , and . ISCAS, page 1. IEEE, (2019)AiSAQ: All-in-Storage ANNS with Product Quantization for DRAM-free Information Retrieval., , , , , and . CoRR, (2024)Revisiting a kNN-Based Image Classification System with High-Capacity Storage., , , , , and . ECCV (37), volume 13697 of Lecture Notes in Computer Science, page 457-474. Springer, (2022)Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology., , , and . A-SSCC, page 25-28. IEEE, (2016)3D-integrated, low-height, small module design techniques for 4.48GHz, 560MHz-bandwidth TransferJet™ transceiver., , , , , , , , , and 6 other author(s). RWS, page 76-78. IEEE, (2014)A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations., , , , , , and . CICC, page 583-586. IEEE, (2005)LogNet: Energy-efficient neural networks using logarithmic computation., , , , and . ICASSP, page 5900-5904. IEEE, (2017)A 0.6V 380µW -14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner., , and . ISSCC, page 224-225. IEEE, (2009)Convolutional neural networks using logarithmic data representation, , and . arXiv preprint arXiv:1603.01025, (2016)