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DFT MAX and Power., , , , , , , , , and 2 other author(s). J. Low Power Electron., 3 (2): 199-205 (2007)Fast functional evaluation of candidate OBDD variable orderings., , , and . EURO-DAC, page 4-10. EEE Computer Society, (1991)Functional Approaches to Generating Orderings for Efficient Symbolic Representations., , and . DAC, page 624-627. IEEE Computer Society Press, (1992)A new methodology for improved tester utilization., , , , , and . ITC, page 916-923. IEEE Computer Society, (2001)Not All Xs are Bad for Scan Compression., and . ATS, page 7-12. IEEE Computer Society, (2008)Evaluation of Entropy Driven Compression Bounds on Industrial Designs., , , , and . ATS, page 13-18. IEEE Computer Society, (2008)A Case Study on Implementing Compressed DFT Architecture., , and . ATS, page 336-341. IEEE Computer Society, (2014)Manufacturing Test of SoCs., and . Asian Test Symposium, page 317-319. IEEE Computer Society, (2002)Limitations in predicting defect level based on stuck-at fault coverage., , , , and . VTS, page 186-191. IEEE Computer Society, (1994)An ATE assisted DFD technique for volume diagnosis of scan chains., , , and . DAC, page 31:1-31:6. ACM, (2013)