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Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation.

, и . ISLPED, стр. 70-75. ACM, (1999)

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Jitendra Lal Ghose

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The Design and Evaluation of the Hierarchical Cubic Network., и . ICPP (1), стр. 355-362. Pennsylvania State University Press, (1990)Multi-Sensory Browser and Editor Model., и . SAC, стр. 443-449. ACM, (1999)Designing Multiprocessor/Distributed Real-Time Systems Using the ASSERTS Toolkit., , , , , , и . Euro-Par, том 1685 из Lecture Notes in Computer Science, стр. 505-510. Springer, (1999)Energy-Efficiency of VLSI Caches: A Comparative Study., и . VLSI Design, стр. 261-267. IEEE Computer Society, (1997)Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors., , , , и . HiPC, том 4297 из Lecture Notes in Computer Science, стр. 135-147. Springer, (2006)A high performance barrier synchronizer and its novel applications in highly parallel systems., и . SPDP, стр. 616-619. IEEE Computer Society, (1991)Protecting grid data transfer services with active network interfaces., , , и . GRID, стр. 9-16. IEEE Computer Society, (2005)A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors., , , и . ICCD, стр. 118-121. IEEE Computer Society, (2002)SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency., , , и . PACT, стр. 265-274. ACM, (2006)Continuous, Low Overhead, Run-Time Validation of Program Executions., , и . MICRO, стр. 229-241. IEEE Computer Society, (2014)