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Disambiguation of "Yue, Hengshan"

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An Approximate Fault-Tolerance Design for a Convolutional Neural Network Accelerator.

, , , and . IT Prof., 25 (4): 85-90 (July 2023)

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Hengshan Qiu

Haidi Yue

Chaofang Yue

Zhihua Yue

Jenny Yuen

 

Other publications of authors with the same name

MSSA-FL: High-Performance Multi-stage Semi-asynchronous Federated Learning with Non-IID Data., , , , and . KSEM (2), volume 13369 of Lecture Notes in Computer Science, page 172-187. Springer, (2022)GLAM-SERP: Building a Graph Learning-Assisted Model for Soft Error Resilience Prediction in GPGPUs., , , and . ICA3PP (4), volume 14490 of Lecture Notes in Computer Science, page 419-435. Springer, (2023)An Approximate Fault-Tolerance Design for a Convolutional Neural Network Accelerator., , , and . IT Prof., 25 (4): 85-90 (July 2023)LAD-ECC: Energy-Efficient ECC Mechanism for GPGPUs Register File., , and . DATE, page 1127-1132. IEEE, (2020)Evaluating the Soft Error Resilience of Instructions for GPU Applications., , , , and . CSE/EUC, page 459-464. IEEE, (2019)DUAL-C: Building a "soft error efficient" on-the-fly compression mechanism for raw video data at edge devices., , , , , and . Future Gener. Comput. Syst., (2024)A Novel Clustering-Based Filter Pruning Method for Efficient Deep Neural Networks., , , and . ICA3PP (2), volume 12453 of Lecture Notes in Computer Science, page 245-258. Springer, (2020)Eff-ECC: Protecting GPGPUs Register File With a Unified Energy-Efficient ECC Mechanism., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (7): 2080-2093 (2022)ApproxDup: Developing an Approximate Instruction Duplication Mechanism for Efficient SDC Detection in GPGPUs., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (4): 1051-1064 (April 2024)FASS-pruner: customizing a fine-grained CNN accelerator-aware pruning framework via intra-filter splitting and inter-filter shuffling., , , , and . CCF Trans. High Perform. Comput., 5 (3): 292-303 (September 2023)