Author of the publication

Sustainable (re-) configurable solutions for the high volume SoC market.

, , and . IPDPS, page 1-8. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Soft-core eFPGA for Smart Power applications., , , and . ISSoC, page 1-4. IEEE, (2014)An in-circuit debug environment for multiprocessor SOCs based on a HDL RISC soft-core., , , , and . SoC, page 193-196. IEEE, (2004)Sustainable (re-) configurable solutions for the high volume SoC market., , and . IPDPS, page 1-8. IEEE, (2008)A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs., , , , , and . CICC, page 309-312. IEEE, (2006)A XiRisc-based SoC for embedded DSP applications., , , , , , , and . CICC, page 595-598. IEEE, (2004)A C-based algorithm development flow for a reconfigurable processor architecture., , , , and . SoC, page 69-73. IEEE, (2003)A stream register file unit for reconfigurable processors., , , , , , and . ISCAS, IEEE, (2006)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , and . DATE, page 9-14. EDA Consortium, San Jose, CA, USA, (2007)Design and implementation of a reconfigurable heterogeneous multiprocessor SoC., , , , , , , and . CICC, page 93-96. IEEE, (2006)Interactive presentation: Implementation of AES/Rijndael on a dynamically reconfigurable architecture., , , and . DATE, page 355-360. EDA Consortium, San Jose, CA, USA, (2007)