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Disambiguation of "Srinivasan, Sudarshan K."

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Formal Verification of Completion-Completeness for NCL Circuits.

, , and . MWSCAS, page 25-28. IEEE, (2020)

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Sudarshan Tiwari

Sudarshan Bahukudumbi

Sudarshan Malla

Sudarshan Baruah

R Srinivasan

 

Other publications of authors with the same name

Formal Verification Approach to Detect Always-On Denial of Service Trojans in Pipelined Circuits., , and . ICECS, page 1-6. IEEE, (2021)Rotational Abstractions for Verification of Quantum Fourier Transform Circuits., , and . CoRR, (2023)Formal modeling and verification for pre-charge half buffer gates and circuits., , and . MWSCAS, page 519-522. IEEE, (2017)A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification Problems., and . CHARME, volume 3725 of Lecture Notes in Computer Science, page 363-366. Springer, (2005)Refinement Maps for Efficient Verification of Processor Models., and . DATE, page 1304-1309. IEEE Computer Society, (2005)Timed Refinement for Verification of Real-Time Object Code Programs., , and . VSTTE, volume 8471 of Lecture Notes in Computer Science, page 252-269. Springer, (2014)Formal Verification For Cyclic Quantum Walk Circuits., and . ISCAS, page 1-5. IEEE, (2024)Formal verification methodology for real-time Field Programmable Gate Array., , and . IET Comput. Digit. Tech., 11 (5): 197-203 (2017)Hardware Mitigation and Verification For Rogue In-Flight Data Load Attacks., , , and . ICECS, page 1-4. IEEE, (2023)Hardware Trojan Design and Detection in Asynchronous NCL Circuits., , and . ICECS, page 1-4. IEEE, (2020)