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A reconfigurable architecture for real-time prediction of neural activity., , , , and . ISCAS, page 1869-1872. IEEE, (2013)A σδ modulator using gain-Boost Class-C Inverter for Audio Applications., , , , , and . Journal of Circuits, Systems, and Computers, (2013)Reconfigurable Number Theoretic Transform architectures for cryptographic applications., , , and . FPT, page 308-311. IEEE, (2010)Automating custom-precision function evaluation for embedded processors., , , , and . CASES, page 22-31. ACM, (2005)Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (7): 2305-2316 (2020)LoRaWAN-based Camera with (CIRA) Compression and Image Recovery Algorithm., , , , and . WF-IoT, page 136-141. IEEE, (2021)An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation., , and . ASAP, page 37. IEEE, (2019)Hydrate: Hybrid Reconfigurable Architecture Expressions., , , and . FPT, page 1-4. IEEE, (2011)A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities., , , , , and . EMBC, page 7282-7285. IEEE, (2011)Customising Hardware Designs for Elliptic Curve Cryptography., , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 274-283. Springer, (2004)