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Disambiguation of "Yamada, Yutaka"

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A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications.

, , , , , , , , , , , , , , , , and . ISSCC, page 132-134. IEEE, (2019)

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Chisaburo Yamada

Yutaka Nojima

Osamu Yamada

Hitoshi Yamada

Keiichi Yamada

 

Other publications of authors with the same name

Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array., , , , , and . EUC, volume 3207 of Lecture Notes in Computer Science, page 301-311. Springer, (2004)FlexGrip™: A small and high-performance programmable hardware for highly sequential application., , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2011)Performance Prediction Method of Examinees Based on Matrix Completion., , and . GCCE, page 229-230. IEEE, (2019)A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications., , , , , , , , , and 7 other author(s). ISSCC, page 132-134. IEEE, (2019)18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications., , , , , , , , , and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)Non-Minimal Routing Strategy for Application-Specific Networks-on-Chips., , , , and . ICPP Workshops, page 273-280. IEEE Computer Society, (2005)Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor., , , , , , , , , and 3 other author(s). FCCM, page 328-329. IEEE Computer Society, (2004)BLACK-BUS: A New Data-Transfer Technique Using Local Address on Networks-on-Chips., , , , and . IPDPS, IEEE Computer Society, (2004)Evaluation of vibration in many positions by SOM., , , and . Artif. Life Robotics, 9 (1): 7-11 (2005)Stream applications on the dynamically reconfigurable processor., , , , , , , , , and 1 other author(s). FPT, page 137-144. IEEE, (2004)