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Disambiguation of "Quintana, José M."

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Logic Models Supporting the Design of MOBILE-based RTD Circuits.

, , and . ASAP, page 254-259. IEEE Computer Society, (2005)

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Humberto Jorge José

Ernesto Quintana

Nadine José Gonzalez

José Baena

José Teixeira

 

Other publications of authors with the same name

High-speed low-power logic gates using floating gates., , , and . ISCAS (5), page 389-392. IEEE, (2002)An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits., , , and . ISCAS, page 491-494. IEEE, (1994)Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications., , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 166-174. Springer, (2012)Limits to a Correct Evaluation in RTD-based Ternary Inverters., , and . ICECS, page 403-406. IEEE, (2006)νMOS-based Sorter for Arithmetic Applications., , , , and . VLSI Design, 11 (2): 129-136 (2000)Efficient νMOS Realization of Threshold Voters for Self-Purging Redundancy., , , and . SBCCI, page 321-326. IEEE Computer Society, (2000)An Encoding Technique for Low Power CMOS Implementations of Controllers., , , , and . DATE, page 1083. IEEE Computer Society, (2002)Logic Models Supporting the Design of MOBILE-based RTD Circuits., , and . ASAP, page 254-259. IEEE Computer Society, (2005)Review of Capacitive Threshold Gate Implementations., , and . ICANN, volume 2714 of Lecture Notes in Computer Science, page 737-744. Springer, (2003)A new method for the state reduction of incompletely specified finite sequential machines., , and . EURO-DAC, page 552-556. IEEE Computer Society, (1990)