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Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization., , , , and . ICCAD, page 528-535. IEEE, (2015)Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (6): 1147-1160 (2019)Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (5): 1481-1494 (2022)How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library., , , , , , and . ISPD, page 25-31. ACM, (2017)Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression., , , , , and . ISPD, page 141-148. ACM, (2015)Concurrent Pin Access Optimization for Unidirectional Routing., , , and . DAC, page 20:1-20:6. ACM, (2017)Fast and efficient lagrangian relaxation-based discrete gate sizing., , , and . DATE, page 1855-1860. EDA Consortium San Jose, CA, USA / ACM DL, (2013)How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization., , , , , and . ISPD, page 3-10. ACM, (2019)Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning., , , , , and . SBCCI, page 1-6. IEEE, (2018)An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms., , , and . SBCCI, page 149-154. ACM, (2011)