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Disambiguation of "Alioto, Massimo"

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Improving Power-Delay Performance of Ultra-Low-Power Subthreshold SCL Circuits.

, , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (2): 127-131 (2009)

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Massimo Viola

Massimo Tallarida

Massimo Malagó

Massimo Moser

Massimo Busin

 

Other publications of authors with the same name

Power-delay trade-offs in SCL gates., and . ISCAS (3), page 249-252. IEEE, (2002)A technique to design high entropy chaos-based true random bit generators., , , , and . ISCAS, IEEE, (2006)Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations., , , , and . ISCAS, page 2043-2046. IEEE, (2011)A fully-synthesizable C-element based PUF featuring temperature variation compensation with native 2.8% BER, 1.02fJ/b at 0.8-1.0V in 40nm., , , and . A-SSCC, page 301-304. IEEE, (2017)Techniques to Enhance the Resistance of Precharged Busses to Differential Power Analysis., , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 624-633. Springer, (2006)Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3 V., , and . ISCAS, page 1-5. IEEE, (2018)Efficient and Accurate Models of Output Transition Time in CMOS Logic., , and . ICECS, page 1264-1267. IEEE, (2007)Analysis of the impact of random process variations in CMOS tapered buffers., , and . ICECS, page 57-60. IEEE, (2009)Energy evaluation in RLC tree circuits with exponential input., , and . ICECS, page 578-581. IEEE, (2008)Analysis of the impact of process variations on static logic circuits versus fan-in., , and . ICECS, page 137-140. IEEE, (2008)