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Disambiguation of "Pandit, Soumya"

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Systematic Methodology for High-Level Performance Modeling of Analog Systems.

, , and . VLSI Design, page 361-366. IEEE Computer Society, (2009)

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Bablu Pandit

Soumya Senapati

Soumya Sarkar

Madhukar Pandit

Madhukar Pandit

 

Other publications of authors with the same name

Systematic Methodology for High-Level Performance Modeling of Analog Systems., , and . VLSI Design, page 361-366. IEEE Computer Society, (2009)An Improved g m /I D Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design., , and . VDAT, volume 382 of Communications in Computer and Information Science, page 128-137. Springer, (2013)A Global Routing Method for Graphene Nanoribbons Based Circuits and Interconnects., , and . ACM J. Emerg. Technol. Comput. Syst., 16 (3): 31:1-31:28 (2020)Study of reverse substrate bias effect of 22nm node epitaxial delta doped channel MOS transistor for low power SoC applications., and . VDAT, page 1-6. IEEE, (2014)Reliability Aware Global Routing of Graphene Nanoribbon Based Interconnect., , and . VDAT, volume 1687 of Communications in Computer and Information Science, page 373-386. Springer, (2022)Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural Network., and . VLSI Design, page 94-99. IEEE Computer Society, (2011)High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count., , , and . DATE, page 1203-1204. European Design and Automation Association, Leuven, Belgium, (2006)A formal approach for high level synthesis of linear analog systems., , and . ACM Great Lakes Symposium on VLSI, page 345-348. ACM, (2006)An automated high-level topology generation procedure for continuous-time SigmaDelta modulator., , and . Integr., 43 (3): 289-304 (2010)A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies., , and . VLSI Design, (2011)