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Disambiguation of "Yoshimoto, Masahiko"

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A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video.

, , , , , , , , , and . IEICE Electron. Express, 14 (15): 20170668 (2017)

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Masahiko Isaji

Kei Yoshimoto

 

Other publications of authors with the same name

An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm., , , , , , , , , and 3 other author(s). CICC, page 167-170. IEEE, (2002)MPEG-2 4: 2: 2@HL encoder chip set., , , , , , , , , and . ISCAS, page 41-44. IEEE, (2000)A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video., , , , , , , , , and . IEICE Electron. Express, 14 (15): 20170668 (2017)A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video IEICE Electronics Express Vol. 14(2017) No. 15 pp. 20170668., , , , , , , , , and . IEICE Electron. Express, 15 (12): 20188003 (2018)A low memory bandwidth Gaussian mixture model (GMM) processor for 20, 000-word real-time speech recognition FPGA system., , , and . FPT, page 341-344. IEEE, (2008)Large displacement haptic stimulus actuator using piezoelectric pump for wearable devices., , , , , and . EMBC, page 1172-1175. IEEE, (2015)Noise tolerant QRS detection using template matching with short-term autocorrelation., , , , , , and . EMBC, page 34-37. IEEE, (2014)A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction., , , , , , and . ISQED, page 489-492. IEEE, (2012)Quality of a Bit (QoB): A New Concept in Dependable SRAM., , , , , , and . ISQED, page 98-102. IEEE Computer Society, (2008)Temperature compensation using least mean squares for fast settling all-digital phase-locked loop., , , , , and . NEWCAS, page 1-4. IEEE, (2013)